coreboot-kgpe-d16/src/southbridge/intel/i82870/p64h2_pcibridge.c
Stefan Reinauer f1cf1f7c3a Ever wondered where those "setting incorrect section attributes for
rodata.pci_driver" warnings are coming from? We were packing those
structures into a read-only segment, but forgot to mark them const.

Despite its size, this is a fairly trivial patch created by a simple
search/replace

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24 09:08:58 +00:00

40 lines
1.1 KiB
C

#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include "82870.h"
static void p64h2_pcix_init(device_t dev)
{
uint32_t dword;
uint16_t word;
uint8_t byte;
/* The purpose of changes to HCCR, ACNF, and MTT is to speed up the
PCI bus for cards having high speed transfers. */
dword = 0xc2040002;
pci_write_config32(dev, HCCR, dword);
dword = 0x0000c3bf;
pci_write_config32(dev, ACNF, dword);
byte = 0x08;
pci_write_config8(dev, MTT, byte);
}
static struct device_operations pcix_ops = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
.init = p64h2_pcix_init,
.scan_bus = pci_scan_bridge,
.reset_bus = pci_bus_reset,
};
static const struct pci_driver pcix_driver __pci_driver = {
.ops = &pcix_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82870_1F0,
};