35dc4b0ede
TEST=Boot majolica and see microcode update CBFS: Found 'cpu_microcode_blob.bin' @0x6900 size 0x15c0 in mcache @0xcf7fe9d8 microcode: patch id to apply = 0x0a50000b microcode: being updated to patch id = 0x0a50000b succeeded Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: If50b1d8b3ebf4b3e6f8a9dd3ab96073e0cb92424 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50616 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
35 lines
680 B
C
35 lines
680 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/cpu.h>
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#include <console/console.h>
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#include <cpu/amd/microcode.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/lapic.h>
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#include <device/device.h>
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#include <soc/cpu.h>
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void mp_init_cpus(struct bus *cpu_bus)
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{
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}
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static void zen_2_3_init(struct device *dev)
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{
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setup_lapic();
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set_cstate_io_addr();
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amd_update_microcode_from_cbfs();
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}
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static struct device_operations cpu_dev_ops = {
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.init = zen_2_3_init,
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};
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static struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_AMD, CEZANNE_A0_CPUID},
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{ 0, 0 },
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};
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static const struct cpu_driver zen_2_3 __cpu_driver = {
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.ops = &cpu_dev_ops,
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.id_table = cpu_table,
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};
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