coreboot-kgpe-d16/src/soc/amd/cezanne/cpu.c
Raul E Rangel 35dc4b0ede soc/amd/cezanne: Enable uCode update
TEST=Boot majolica and see microcode update
CBFS: Found 'cpu_microcode_blob.bin' @0x6900 size 0x15c0 in mcache @0xcf7fe9d8
microcode: patch id to apply = 0x0a50000b
microcode: being updated to patch id = 0x0a50000b succeeded

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: If50b1d8b3ebf4b3e6f8a9dd3ab96073e0cb92424
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50616
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-02-14 18:05:26 +00:00

35 lines
680 B
C

/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/cpu.h>
#include <console/console.h>
#include <cpu/amd/microcode.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <device/device.h>
#include <soc/cpu.h>
void mp_init_cpus(struct bus *cpu_bus)
{
}
static void zen_2_3_init(struct device *dev)
{
setup_lapic();
set_cstate_io_addr();
amd_update_microcode_from_cbfs();
}
static struct device_operations cpu_dev_ops = {
.init = zen_2_3_init,
};
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_AMD, CEZANNE_A0_CPUID},
{ 0, 0 },
};
static const struct cpu_driver zen_2_3 __cpu_driver = {
.ops = &cpu_dev_ops,
.id_table = cpu_table,
};