coreboot-kgpe-d16/src/soc/intel/braswell
Philipp Deppenwiese 66f9a09916 security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_loader and cbfs.
* Implement and hook-up CRTM in vboot and check for suspend.

Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-25 22:29:16 +00:00
..
acpi
bootblock arch/x86: Use a common timestamp.inc with romcc bootblocks 2018-12-30 12:30:55 +00:00
include/soc buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
romstage device: Use pcidev_on_root() 2019-01-06 01:17:54 +00:00
acpi.c buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
chip.c src/soc/intel/braswell: Use DEVICE_NOOP 2019-01-20 21:02:43 +00:00
chip.h
cpu.c cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx() 2018-12-20 22:18:05 +00:00
elog.c
emmc.c
gfx.c soc/braswell: ensure ACPI opregion restored on S3 with GOP init 2018-12-18 13:28:01 +00:00
gpio.c
gpio_support.c
hda.c
iosf.c
Kconfig Untangle CBFS microcode updates 2019-01-10 09:24:02 +00:00
lpc_init.c
lpe.c
lpss.c
Makefile.inc security/vboot: Add measured boot mode 2019-02-25 22:29:16 +00:00
memmap.c
northcluster.c src/soc/intel/braswell/northcluster.c: Correct Chromeos RAM reservation 2018-12-19 05:25:08 +00:00
pcie.c
placeholders.c
pmutil.c buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
ramstage.c device: Use pcidev_on_root() 2019-01-06 01:17:54 +00:00
sata.c
scc.c soc: Remove useless include <device/pci_ids.h> 2018-12-19 05:20:49 +00:00
sd.c
smihandler.c
smm.c
southcluster.c
spi.c buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
tsc_freq.c buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
xhci.c