51dde6fe3b
- Add silvermont (Bay Trail core) MSRs - these are shared with rangeley/avoton. - Add GPIO values and GPIO muxing information. - Add Bay Trail to the PM list. Still to do: - Northbridge functionality (RCBA, Memory timings, etc.) - Add Graphics registers Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7711 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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| .. | ||
| Makefile | ||
| amb.c | ||
| cpu.c | ||
| gpio.c | ||
| inteltool.8 | ||
| inteltool.c | ||
| inteltool.h | ||
| ivy_memory.c | ||
| memory.c | ||
| pcie.c | ||
| powermgt.c | ||
| rootcmplx.c | ||