84da959c69
Fix the SMI and SCI gpios for Rambi. Also, add in the
EC callbacks for the SMI handler. Note that the handler
for GPI SMIs has not been tested yet as baytrail chipset
code doesn't yet support setting up those configurations
yet.
BUG=chrome-os-partner:23505
BRANCH=None
TEST=Noted that SCI was enabled in /sys/firmware/acpi/interrupts
for the EC's SCI GPI. Also was able to see Chrome EC messages
with CONFIG_DEBUG_SMI and powering down at the dev screen.
Change-Id: I67b278fd38e1c09271d2c1e16e42f6e8c49e3a70
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176077
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4948
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
66 lines
2.4 KiB
C
66 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef MAINBOARD_EC_H
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#define MAINBOARD_EC_H
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#include <ec/google/chromeec/ec_commands.h>
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/* GPIO_S0_000 is EC_SCI#, but it is bit 24 in GPE_STS */
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#define EC_SCI_GPI 24
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/* GPIO_S5_07 is EC_SMI#, but it is bit 23 in GPE_STS and ALT_GPIO_SMI. */
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#define EC_SMI_GPI 23
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#define MAINBOARD_EC_SCI_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_OVERLOAD) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_CHARGER))
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#define MAINBOARD_EC_SMI_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED))
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/* EC can wake from S5 with lid or power button */
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#define MAINBOARD_EC_S5_WAKE_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON))
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/* EC can wake from S3 with lid or power button or key press */
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#define MAINBOARD_EC_S3_WAKE_EVENTS \
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(MAINBOARD_EC_S5_WAKE_EVENTS |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED))
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/* Log EC wake events plus EC shutdown events */
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#define MAINBOARD_EC_LOG_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN))
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#ifndef __ACPI__
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extern void mainboard_ec_init(void);
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#endif
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#endif
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