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Mario Scheithauer 67f63e768d src/device + util/sconfig: Introduce new device 'mdio'
This patch extends the available device paths with a new device 'mdio'.
MDIO is the 'Management Data Input/Output' called interface which is
used to access an Ethernet PHY behind a MAC to change settings. The real
payload data path is not handled by this interface.

To address the PHY correctly on the MDIO bus, there is a 5 bit address
needed, which often can be configured via pins on the mainboard.
Therefore, the new introduced device has an 'addr' field to define its
address. If one wants to use a MDIO device in devicetree, the syntax is
straight forward (example):
	device mdio 0x2 on end

As the MDIO interface is driven by the MAC, most likely this MDIO device
will be hooked in as a child device of the (PCI attached) MAC device.

With the new introduced ops_mdio a new interface is added to provide an
API for read and write access over MDIO.

Change-Id: I6691f92c4233bc30afc9029840b06f74bb1eb4b2
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69382
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-24 05:53:55 +00:00
3rdparty 3rdparty/blobs: Advance submodule pointer 2022-11-07 14:20:07 +00:00
Documentation Docs: Add SPDX headers to Makefiles 2022-11-20 15:24:32 +00:00
LICENSES src/mb: Update unlicensable files with the CC-PDDC SPDX ID 2022-08-13 19:25:12 +00:00
configs configs: Buildtest 64bit amd/picasso 2022-11-16 04:22:29 +00:00
payloads libpayload: Fix compiler warnings 2022-11-21 21:08:30 +00:00
spd spd/lp5: Re-generate the SPD data 2022-10-28 12:06:29 +00:00
src src/device + util/sconfig: Introduce new device 'mdio' 2022-11-24 05:53:55 +00:00
tests cbmem_top_chipset: Change the return value to uintptr_t 2022-11-18 16:00:45 +00:00
util src/device + util/sconfig: Introduce new device 'mdio' 2022-11-24 05:53:55 +00:00
.checkpatch.conf checkpatch.conf: Ignore check for pointer comparisons to NULL 2022-09-22 15:13:35 +00:00
.clang-format
.editorconfig
.gitignore .gitignore: Add .vscode/ 2022-08-30 17:56:55 +00:00
.gitmodules Add SBOM (Software Bill of Materials) Generation 2022-08-22 14:48:46 +00:00
.gitreview
.mailmap
AUTHORS arm/libgcc: Support signed 64-bit division 2022-08-13 17:20:32 +00:00
COPYING
MAINTAINERS MAINTAINERS: Make Misc Fixes 2022-10-30 01:48:45 +00:00
Makefile Makefile: Add targets to add and remove symlinks 2022-10-17 14:00:46 +00:00
Makefile.inc build: List all Kconfigs in CBFS `config` file, compress it 2022-11-18 17:19:44 +00:00
README.md Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
gnat.adc
toolchain.inc coreboot: Add support for include-what-you-use 2022-10-11 14:33:28 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.