dbec2d4090
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
63 lines
3.1 KiB
Text
63 lines
3.1 KiB
Text
- 1.1.7
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- The configuration language has been cleaned up. No more link keyword.
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- Everything is now in the device tree.
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- The static and dynamic device trees have been unified
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- Support for setting the pci subsystem vendor and pci subsystem device has been added.
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- 64bit resource support
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- Generic smbus support
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- 1.1.6
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- pnp/superio devices are now handled cleanly with very little code
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- Initial support for finding x86 BIST errors
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- static resource assignments can now be specified in Config.lb
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- special VGA I/O decode now should work
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- added generic PCI error reporting enables
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- build_opt_tbl now generates a header that allows cmos settings to
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be read from romcc compiled code.
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- split IORESOURCE_SET into IORESOURCE_ASSIGNED and IORESOURCE_STORED
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- romcc now gracesfully handles function pointers instead of dying mysteriously
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- First regression test in amdk8/raminit_test
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- 1.1.5
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- O2, enums, and switch statements work in romcc
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- Support for compiling romcc on non x86 platforms
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- new romc options -msse and -mmmx for specifying extra registers to use
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- Bug fixes to device the device disable/enable framework and an amd8111 implementation
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- Move the link specification to the chip specification instead of the path
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- Allow specifying devices with internal bridges.
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- Initial via epia support
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- Opteron errata fixes
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- 1.1.4
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Major restructuring of hypertransport handling.
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Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
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Updates to hard_reset handling when resetting because of the need to change hypertransport link
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speeds and widths.
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(a) No longer assume the boot is good just because we get to a hard reset point.
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(b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
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boot counter.
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Updates to arima/hdama mptable so it tracks the new bus numbers
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- 1.1.3
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Major update of the dyanmic device tree to so it can handle
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* subtractive resources
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* merging with the static device tree
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* more device types than just pci
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- 1.1.2
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Add back in the hard_reset method from freebios1 this allows generic
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code to reset the box.
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Update the hypertransport setup code to automatically optimize
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hypertransport link widths and frequencies, and to call hard_reset
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if necessary for the changes to go into effect.
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- 1.1.1
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Updates to the new configuration system so it works more reliably
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Removed a bunch of unused configuration variables
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Removed a bunch of unused assembly code
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- 1.1.0
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A whole bunch of random ppc and opteron work we never put a good label on
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- 1.1.0
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Intial development release of LinuxBIOS.
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Everything is thrown overboard and will be reincluded as necessary so we can
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get rid of the legacy baggage. Since LinuxBIOS was started we have developed
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some better techniques for some things, but we still hang on to the old ways
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because some ports that we want not to break depend on them. So we preserve
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them by preserve the 1.0.x series and keeping only the best practices for
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the 1.1.x series. When there is a stable port this code base will
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become LinuxBIOS 2.0.x and the core will become frozen.
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