a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
43 lines
1.1 KiB
C
43 lines
1.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/cache.h>
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#include <arm_tf.h>
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#include <assert.h>
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#include <soc/addressmap.h>
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#include <stdlib.h>
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#include <string.h>
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#include <symbols.h>
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typedef struct bl31_plat_params {
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uint32_t tzdram_size;
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} bl31_plat_params_t;
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static bl31_plat_params_t t210_plat_params;
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void *soc_get_bl31_plat_params(bl31_params_t *params)
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{
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uintptr_t tz_base_mib;
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size_t tz_size_mib;
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carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
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assert(tz_size_mib < 4096);
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t210_plat_params.tzdram_size = tz_size_mib * MiB;
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dcache_clean_by_mva(&t210_plat_params, sizeof(t210_plat_params));
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return &t210_plat_params;
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}
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