Jessy Jiang 69da754112 mb/google/kukui: Add Micron 4GB discrete LPDDR4X DDR support ... Support 4G+128G MT29VZZZAD9GQFSM-046 W.9S9 discrete DDR bootup. BUG=b:162292216 BRANCH=kukui TEST=Boots correctly on Kukui. Signed-off-by: Jessy Jiang <jiangchao5@huaqin.corp-partner.google.com> Change-Id: I5657a007154bc52c6f0f27e1de6e3294a5e74ad7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48686 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>		2021-03-08 01:49:33 +00:00
..
acpi	acpi: Move PCI functions to separate file	2021-03-01 08:26:23 +00:00
arch	mb/ocp/deltalake: Fill ECC type in romstage	2021-03-01 08:22:28 +00:00
commonlib	commonlib/bsd: Fix direct inclusion of <endian.h>	2021-02-18 02:33:04 +00:00
console	console/vtxprintf.c: Add missing <types.h>	2021-02-16 08:15:26 +00:00
cpu	src/cpu: Remove unused symbols	2021-02-18 10:11:24 +00:00
device	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00
drivers	drivers/intel/gma/gma.ads: Uniformize casing	2021-03-05 10:59:00 +00:00
ec	ec/system76/ec: Add OLED screen toggle	2021-02-27 09:38:19 +00:00
include	soc/intel/broadwell/pch: Use Lynx Point smbus.c	2021-03-05 10:57:10 +00:00
lib	lib/cbfs.c: Fix return value of failure to measure	2021-03-03 08:58:48 +00:00
mainboard	mb/google/kukui: Add Micron 4GB discrete LPDDR4X DDR support	2021-03-08 01:49:33 +00:00
northbridge	nb/intel/haswell: Indent PCI ops with tabs	2021-03-07 19:25:50 +00:00
security	security/tpm/tss/vendor/cr50: Introduce vendor sub-command to reset EC	2021-03-05 10:57:01 +00:00
soc	soc/amd/picasso: move APOB NV cache to common code	2021-03-06 18:40:33 +00:00
southbridge	sb/intel/lynxpoint/me.c: Reorder functions	2021-03-07 19:23:53 +00:00
superio	superio/smsc/sch5545: Add missing <types.h>	2021-02-13 22:06:28 +00:00
vendorcode	vc/amd/fsp/picasso: fix DDI enum name prefix	2021-03-04 23:51:21 +00:00
Kconfig	southbridge: Ensure common Kconfig gets included last	2021-02-18 10:11:39 +00:00