40d93494c3
Allow bootblock to get access to the static device tree like other early stages. device_romstage.c was renamed to device_simple.c to better articulate the usage since it's not just being used in romstage. BUG=chrome-os-partner:55357 Change-Id: I3d63d2754c737cc738c09a3e3b3b468362fb78d1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15837 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins)
38 lines
1.3 KiB
Makefile
38 lines
1.3 KiB
Makefile
ramstage-y += device.c
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ramstage-y += root_device.c
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ramstage-y += cpu_device.c
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ramstage-y += device_util.c
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ramstage-$(CONFIG_PCI) += pci_class.c
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ramstage-$(CONFIG_PCI) += pci_device.c
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ramstage-$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) += hypertransport.c
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ramstage-$(CONFIG_PCIX_PLUGIN_SUPPORT) += pcix_device.c
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ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c
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ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c
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ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c
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ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c
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ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += pnp_device.c
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ramstage-$(CONFIG_PCI) += pci_ops.c
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ramstage-$(CONFIG_PCI) += pci_early.c
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ramstage-$(CONFIG_PCI) += pci_rom.c
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ramstage-y += smbus_ops.c
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ifeq ($(CONFIG_AZALIA_PLUGIN_SUPPORT),y)
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
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endif
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bootblock-y += device_simple.c
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verstage-y += device_simple.c
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romstage-y += device_simple.c
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romstage-$(CONFIG_PCI) += pci_early.c
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subdirs-y += oprom dram
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bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
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bootblock-y += i2c.c
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verstage-y += i2c.c
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romstage-y += i2c.c
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ramstage-y += i2c.c
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