6a566d7fbe
Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters Changed a few comments to reduce line length. File src/include/cpu/amd/vr.h was skipped. TEST=Build and run on Galileo Gen2 Change-Id: Ie3c07111acc1f89923fb31135684a6d28a505b61 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18687 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
138 lines
4.3 KiB
C
138 lines
4.3 KiB
C
/*
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* PCI defines and function prototypes
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* Copyright 1994, Drew Eckhardt
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* Copyright 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* For more information, please consult the following manuals (look at
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* http://www.pcisig.com/ for how to get them):
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*
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* PCI BIOS Specification
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* PCI Local Bus Specification
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* PCI to PCI Bridge Specification
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* PCI System Design Guide
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*/
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#ifndef PCI_H
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#define PCI_H
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#if CONFIG_PCI
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#include <stdint.h>
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#include <stddef.h>
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#include <rules.h>
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#include <arch/io.h>
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#include <device/pci_def.h>
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#include <device/resource.h>
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#include <device/device.h>
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#include <device/pci_ops.h>
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#include <device/pci_rom.h>
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#ifndef __SIMPLE_DEVICE__
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/* Common pci operations without a standard interface */
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struct pci_operations {
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/* set the Subsystem IDs for the PCI device */
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void (*set_subsystem)(device_t dev, unsigned int vendor,
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unsigned int device);
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void (*set_L1_ss_latency)(device_t dev, unsigned int off);
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};
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/* Common pci bus operations */
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struct pci_bus_operations {
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uint8_t (*read8)(struct bus *pbus, int bus, int devfn, int where);
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uint16_t (*read16)(struct bus *pbus, int bus, int devfn, int where);
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uint32_t (*read32)(struct bus *pbus, int bus, int devfn, int where);
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void (*write8)(struct bus *pbus, int bus, int devfn, int where,
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uint8_t val);
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void (*write16)(struct bus *pbus, int bus, int devfn, int where,
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uint16_t val);
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void (*write32)(struct bus *pbus, int bus, int devfn, int where,
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uint32_t val);
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};
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struct pci_driver {
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const struct device_operations *ops;
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unsigned short vendor;
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unsigned short device;
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const unsigned short *devices;
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};
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#define __pci_driver __attribute__ ((used, __section__(".rodata.pci_driver")))
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/** start of compile time generated pci driver array */
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extern struct pci_driver _pci_drivers[];
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/** end of compile time generated pci driver array */
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extern struct pci_driver _epci_drivers[];
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extern struct device_operations default_pci_ops_dev;
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extern struct device_operations default_pci_ops_bus;
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void pci_dev_read_resources(device_t dev);
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void pci_bus_read_resources(device_t dev);
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void pci_dev_set_resources(device_t dev);
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void pci_dev_enable_resources(device_t dev);
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void pci_bus_enable_resources(device_t dev);
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void pci_bus_reset(struct bus *bus);
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device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned int devfn);
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void do_pci_scan_bridge(device_t bus,
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void (*do_scan_bus)(struct bus *bus,
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unsigned int min_devfn, unsigned int max_devfn));
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void pci_scan_bridge(device_t bus);
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void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
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unsigned int max_devfn);
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uint8_t pci_moving_config8(struct device *dev, unsigned int reg);
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uint16_t pci_moving_config16(struct device *dev, unsigned int reg);
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uint32_t pci_moving_config32(struct device *dev, unsigned int reg);
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struct resource *pci_get_resource(struct device *dev, unsigned long index);
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void pci_dev_set_subsystem(device_t dev, unsigned int vendor,
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unsigned int device);
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void pci_dev_init(struct device *dev);
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unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev);
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const char *pin_to_str(int pin);
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int get_pci_irq_pins(device_t dev, device_t *parent_bdg);
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void pci_assign_irqs(unsigned int bus, unsigned int slot,
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const unsigned char pIntAtoD[4]);
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const char *get_pci_class_name(device_t dev);
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const char *get_pci_subclass_name(device_t dev);
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#define PCI_IO_BRIDGE_ALIGN 4096
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#define PCI_MEM_BRIDGE_ALIGN (1024*1024)
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static inline const struct pci_operations *ops_pci(device_t dev)
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{
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const struct pci_operations *pops;
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pops = 0;
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if (dev && dev->ops)
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pops = dev->ops->ops_pci;
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return pops;
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}
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#endif /* ! __SIMPLE_DEVICE__ */
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#ifdef __SIMPLE_DEVICE__
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unsigned int pci_find_next_capability(pci_devfn_t dev, unsigned int cap,
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unsigned int last);
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unsigned int pci_find_capability(pci_devfn_t dev, unsigned int cap);
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#else /* !__SIMPLE_DEVICE__ */
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unsigned int pci_find_next_capability(device_t dev, unsigned int cap,
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unsigned int last);
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unsigned int pci_find_capability(device_t dev, unsigned int cap);
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#endif /* __SIMPLE_DEVICE__ */
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void pci_early_bridge_init(void);
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int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);
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#ifndef __ROMCC__
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static inline int pci_base_address_is_memory_space(unsigned int attr)
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{
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return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
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}
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#endif
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#endif /* CONFIG_PCI */
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#endif /* PCI_H */
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