0bb875be5e
This goes thru various call sites where we used timer_us() and updates them to use the new monotonic timer API. udelay() changed substantially and now gracefully handles wraparound. Change-Id: Ie2cc86a4125cf0de12837fd7d337a11aed25715c Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/3176 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
42 lines
1.3 KiB
Makefile
42 lines
1.3 KiB
Makefile
# Run an intermediate step when producing coreboot.rom
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# that adds additional components to the final firmware
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# image outside of CBFS
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INTERMEDIATE += exynos5250_add_bl1
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bootblock-y += pinmux.c mct.c power.c
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# Clock is required for UART
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bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c
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bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c
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bootblock-$(CONFIG_EARLY_CONSOLE) += monotonic_timer.c
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bootblock-$(CONFIG_EARLY_CONSOLE) += soc.c
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bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
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romstage-y += clock.c
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romstage-y += clock_init.c
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romstage-y += pinmux.c # required by s3c24x0_i2c (exynos5-common) and uart.
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romstage-y += dmc_common.c
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romstage-y += dmc_init_ddr3.c
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romstage-y += power.c
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romstage-y += mct.c
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romstage-y += monotonic_timer.c
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romstage-$(CONFIG_EARLY_CONSOLE) += soc.c
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romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
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#ramstage-y += tzpc_init.c
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ramstage-y += clock.c
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ramstage-y += clock_init.c
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ramstage-y += pinmux.c
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ramstage-y += power.c
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ramstage-y += soc.c
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ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
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ramstage-y += cpu.c
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ramstage-y += exynos5250-tmu.c
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ramstage-y += mct.c
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ramstage-y += monotonic_timer.c
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#ramstage-$(CONFIG_SATA_AHCI) += sata.c
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exynos5250_add_bl1: $(obj)/coreboot.pre
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printf " DD Adding Samsung Exynos5250 BL1\n"
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dd if=3rdparty/cpu/samsung/exynos5250/E5250.nbl1.bin \
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of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
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