b9e6e1ab35
This moves the prototype for power_enable_hw_thermal_trip() to a generic location so it can be used by generalized thermal management code. The implementation will still be CPU-specific. Change-Id: Iae449cb8c72c8441dedaf65b73db9898b4730cef Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/3105 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
144 lines
3.4 KiB
C
144 lines
3.4 KiB
C
/*
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* Power setup code for EXYNOS5
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*
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* Copyright (C) 2012 Samsung Electronics
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <arch/hlt.h>
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#include <arch/io.h>
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#include <arch/hlt.h>
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#include <console/console.h>
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#include <cpu/samsung/exynos5-common/power.h>
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#include <cpu/samsung/exynos5250/cpu.h>
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#include <cpu/samsung/exynos5250/power.h>
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#include <cpu/samsung/exynos5250/sysreg.h>
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static void ps_hold_setup(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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/* Set PS-Hold high */
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setbits_le32(&power->ps_hold_ctrl, POWER_PS_HOLD_CONTROL_DATA_HIGH);
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}
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void power_reset(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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/* Clear inform1 so there's no change we think we've got a wake reset */
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power->inform1 = 0;
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setbits_le32(&power->sw_reset, 1);
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}
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/* This function never returns */
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void power_shutdown(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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clrbits_le32(&power->ps_hold_ctrl, POWER_PS_HOLD_CONTROL_DATA_HIGH);
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hlt();
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}
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void power_enable_dp_phy(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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setbits_le32(&power->dptx_phy_control, DPTX_PHY_ENABLE);
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}
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void power_enable_usb_phy(void)
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{
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struct exynos5_sysreg *sysreg =
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samsung_get_base_sysreg();
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struct exynos5_power *power =
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samsung_get_base_power();
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unsigned int phy_cfg;
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/* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */
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phy_cfg = readl(&sysreg->usb20_phy_cfg);
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if (phy_cfg & USB20_PHY_CFG_EN) {
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debug("USB 2.0 HOST link already selected\n");
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} else {
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phy_cfg |= USB20_PHY_CFG_EN;
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writel(phy_cfg, &sysreg->usb20_phy_cfg);
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}
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/* Enabling USBHOST_PHY */
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setbits_le32(&power->usb_host_phy_ctrl, POWER_USB_HOST_PHY_CTRL_EN);
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}
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void power_disable_usb_phy(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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/* Disabling USBHost_PHY */
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clrbits_le32(&power->usb_host_phy_ctrl, POWER_USB_HOST_PHY_CTRL_EN);
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}
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void power_enable_hw_thermal_trip(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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/* Enable HW thermal trip */
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setbits_le32(&power->ps_hold_ctrl, POWER_ENABLE_HW_TRIP);
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}
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uint32_t power_read_reset_status(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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return power->inform1;
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}
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void power_exit_wakeup(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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typedef void (*resume_func)(void);
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((resume_func)power->inform0)();
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}
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int power_init(void)
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{
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ps_hold_setup();
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return 0;
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}
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void power_enable_xclkout(void)
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{
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struct exynos5_power *power =
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samsung_get_base_power();
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/* use xxti for xclk out */
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clrsetbits_le32(&power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
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PMU_DEBUG_XXTI);
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}
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