295 lines
5.3 KiB
Plaintext
295 lines
5.3 KiB
Plaintext
##
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## This file is part of the coreboot repair project.
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##
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## Redistribution and use in source and binary forms, with or without
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## modification, are permitted provided that the following conditions
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## are met:
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## 1. Redistributions of source code must retain the above copyright
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## notice, this list of conditions and the following disclaimer.
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## 2. Redistributions in binary form must reproduce the above copyright
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## notice, this list of conditions and the following disclaimer in the
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## documentation and/or other materials provided with the distribution.
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## 3. The name of the author may not be used to endorse or promote products
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## derived from this software without specific prior written permission.
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##
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## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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## ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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## SUCH DAMAGE.
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##
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mainmenu "Coreboot Configuration"
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source src/mainboard/Kconfig
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source src/arch/i386/Kconfig
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source src/arch/ppc/Kconfig
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source src/devices/Kconfig
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source src/northbridge/Kconfig
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source src/southbridge/Kconfig
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source src/superio/Kconfig
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source src/cpu/Kconfig
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config CBFS
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bool
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default y
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config HAVE_HIGH_TABLES
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bool
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default y
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config PCI_BUS_SEGN_BITS
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int
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default 0
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0
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config CPU_ADDR_BITS
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int
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default 36
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config XIP_ROM_BASE
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hex
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default 0xfffe0000
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config XIP_ROM_SIZE
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hex
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default 0x20000
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config LB_CKS_RANGE_START
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int
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default 49
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config LB_CKS_RANGE_END
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int
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default 125
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config LB_CKS_LOC
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int
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default 126
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config LOGICAL_CPUS
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int
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default 1
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config PCI_ROM_RUN
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int
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default 0
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config HT_CHAIN_UNITID_BASE
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int
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default 1
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config HT_CHAIN_END_UNITID_BASE
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int
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default 32
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config HEAP_SIZE
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hex
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default 0x2000
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config COREBOOT_V2
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bool
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default y
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config COREBOOT_V4
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bool
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default y
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config DEBUG
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bool
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default n
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config USE_PRINTK_IN_CAR
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bool
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default n
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config USE_OPTION_TABLE
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bool
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default n
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config MAX_CPUS
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int
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default 1
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config MMCONF_SUPPORT_DEFAULT
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bool
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default n
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config MMCONF_SUPPORT
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bool
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default n
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config LB_MEM_TOPK
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int
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default 2048
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config MULTIBOOT
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bool
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default n
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config COMPRESSED_PAYLOAD_LZMA
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bool
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default y
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config COMPRESSED_PAYLOAD_NRV2B
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bool
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default n
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source src/console/Kconfig
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config HAVE_ACPI_RESUME
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bool
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default n
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config ACPI_SSDTX_NUM
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int
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default 0
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config HAVE_ACPI_TABLES
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bool
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default n
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config HAVE_FALLBACK_BOOT
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bool
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default y
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config USE_FALLBACK_IMAGE
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bool
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default y
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config HAVE_HARD_RESET
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bool
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default n
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config HAVE_INIT_TIMER
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bool
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default n
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config HAVE_MAINBOARD_RESOURCES
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bool
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default n
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config HAVE_MOVNTI
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bool
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default y
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config HAVE_MP_TABLE
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bool
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default n
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config HAVE_OPTION_TABLE
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bool
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default y
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config HAVE_PIRQ_TABLE
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bool
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default n
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config PIRQ_ROUTE
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bool
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default n
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config HAVE_SMI_HANDLER
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bool
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default n
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config PCI_IO_CFG_EXT
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bool
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default n
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config IOAPIC
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bool
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default n
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menu "Drivers"
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endmenu
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menu "Payload"
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config COMPRESSED_PAYLOAD_LZMA
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bool "Use LZMA compression for payloads"
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default yes
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choice
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prompt "Payload type"
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default PAYLOAD_NONE
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config PAYLOAD_ELF
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bool "An ELF executable payload file"
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help
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Select this option if you have a payload image (an ELF file)
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which coreboot should run as soon as the basic hardware
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initialization is completed.
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You will be able to specify the location and file name of the
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payload image later.
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config VGA_BIOS
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bool "Add a VGA BIOS image"
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depends on PAYLOAD_ELF
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help
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Select this option if you have a VGA BIOS image that you would
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like to add to your ROM.
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You will be able to specify the location and file name of the
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image later.
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config PAYLOAD_NONE
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bool "No payload"
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help
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Select this option if you want to create an "empty" coreboot
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ROM image for a certain mainboard, i.e. a coreboot ROM image
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which does not yet contain a payload.
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For such an image to be useful, you have to use the 'lar' tool
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to add a payload to the ROM image later.
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endchoice
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config FALLBACK_PAYLOAD_FILE
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string "Payload path and filename"
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depends on PAYLOAD_ELF
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default "payload.elf"
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help
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The path and filename of the ELF executable file to use as fallback payload.
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config FALLBACK_VGA_BIOS_FILE
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string "VGA BIOS path and filename"
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depends on VGA_BIOS
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default "vgabios.bin"
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help
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The path and filename of the file to use as VGA BIOS.
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config FALLBACK_VGA_BIOS_ID
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string "VGA BIOS ID"
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depends on VGA_BIOS
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default "1106,3230"
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help
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The ID that would associate your VGA BIOS to your video card.
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endmenu
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config GDB_STUB
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bool "Enable GDB debugging support"
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default y
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help
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If this is set, then you will be able to set breakpoints for gdb debugging.
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See: src/arch/i386/lib/c_start.S
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