coreboot-kgpe-d16/src/mainboard/google/veyron
David Hendricks 6d5b2f7057 google/veyron_*: Add new Micron and Hynix modules
This adds SDRAM entries for the following modules:
- Micron: DDMT52L256M64D2PP-107
- Hynix: H9CCNNNBKTALBR-NUD

They are compatible with Samsung K4E8E324EB-EGCF, so this just
copies sdram-lpddr3-samsung-2GB-24EB.inc and changes the name used
in the comment near the top.

Notes on our "special snowflake" boards:
- veyron_danger's RAM ID is hard-coded to zero, so I skipped changes
  involving the binary first numbering scheme.
- Rialto's SDRAM mapping is different, so I padded its SDRAM entries
  to 24 to match other boards.
- veyron_mickey requires different MR3 and ODT settings than other
  boards due to its unique PCB (chrome-os-partner:43626).

BUG=chrome-os-partner:59997
BRANCH=none
TEST=Booted new modules on Mickey (see BUG)

Change-Id: If2e22c83f4a08743f12bbc49b3fabcbf1d7d07dd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 35cac483e86e57899dbb0898dad3510f4c2ab2d3
Original-Change-Id: I22386a25b965a4b96194d053b97e3269dbdea8c7
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/412328
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Queue: Jiazi Yang <Tomato_Yang@asus.com>
Original-Tested-by: Jiazi Yang <Tomato_Yang@asus.com>
Original-(cherry picked from commit bd5aa1a5488b99f2edc3e79951064a1f824062f6)
Original-Reviewed-on: https://chromium-review.googlesource.com/446299
Original-Commit-Ready: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Tested-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18518
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-07 17:45:53 +01:00
..
sdram_inf google/veyron_*: Add new Micron and Hynix modules 2017-03-07 17:45:53 +01:00
board.h
board_info.txt
boardid.c google/veyron_*: Add new Micron and Hynix modules 2017-03-07 17:45:53 +01:00
bootblock.c Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
chromeos.c Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
chromeos.fmd
devicetree.cb Veyron: Increase bit-per-pixel to 32 2016-09-20 21:51:28 +02:00
Kconfig vendorcode/google/chromeos: Fill in firmware ID regions 2016-12-13 19:45:49 +01:00
Kconfig.name
mainboard.c
Makefile.inc
memlayout.ld
reset.c
romstage.c
sdram_configs.c google/veyron_*: Add new Micron and Hynix modules 2017-03-07 17:45:53 +01:00