Tim Wawrzynczak 6db9dccc57 soc/intel: Fix microcode loading ... Commit 1aa60a95bd broke microcode loading for chipsets that have a microcode blob with a total_size field set to 0. This appears to be support for older chipsets, where the size was set to 0 and assumed to be 2048 bytes. The fix is to change the result of the subtraction to a signed type, and ensure the following comparison is done without promoting the signed type to an unsigned one. Resolves: https://ticket.coreboot.org/issues/313 Change-Id: I62def8014fd3f3bbf607b4d58ddc4dca4c695622 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56153 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Ott <coreboot@desire.ch> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-07-09 11:49:02 +00:00
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amd	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
armltd	Kconfig: comply to Linux 5.3's Kconfig language rules	2019-11-23 20:09:56 +00:00
intel	soc/intel: Fix microcode loading	2021-07-09 11:49:02 +00:00
qemu-power8	src: Remove leading blank lines from SPDX header	2020-05-18 07:00:27 +00:00
qemu-x86	arch/x86: Use ENV_X86_64 instead of _x86_64_	2021-07-06 06:09:13 +00:00
x86	arch/x86: Use ENV_X86_64 instead of _x86_64_	2021-07-06 06:09:13 +00:00
Kconfig	src/cpu: Remove unused symbols	2021-02-18 10:11:24 +00:00
Makefile.inc	src/cpu: Remove unused symbols	2021-02-18 10:11:24 +00:00