coreboot-kgpe-d16/src/mainboard/google/oak/sdram_configs.c
PH Hsu 1cae20c47f google/oak: Add DRAM configuration for Samsung K4E8E324EB
Add the configuration for Samsung K4E8E324EB and assign it to RAM_CODE 5.

BUG=chrome-os-partner:58983
TEST=verified on Hana EVT.

Change-Id: Iea55eb393b21e37f36d454706531f588101ee651
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 38d34ed0a0b420e1ab300a47b99035153be5b5d0
Original-Change-Id: I28724c1cf5cf12f47911a571c20280ddab4500d5
Original-Signed-off-by: PH Hsu <ph.hsu@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/410926
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17567
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-11-29 16:08:01 +01:00

49 lines
2.2 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright 2015 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <boardid.h>
#include <console/console.h>
#include <soc/emi.h>
#include <stdlib.h>
static const struct mt8173_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc" /* ram_code = 0000 */
#include "sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc" /* ram_code = 0001 */
#include "sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc" /* ram_code = 0010 */
#include "sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc" /* ram_code = 0011 */
#include "sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc" /* ram_code = 0100 */
#include "sdram_inf/sdram-lpddr3-K4E8E324EB-2GB.inc" /* ram_code = 0101 */
#include "sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc" /* ram_code = 0110 */
#include "sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc" /* ram_code = 0111 */
#include "sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc" /* ram_code = 1000 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
};
const struct mt8173_sdram_params *get_sdram_config(void)
{
u32 ramcode = ram_code();
if (ramcode >= ARRAY_SIZE(sdram_configs)
|| sdram_configs[ramcode].type == TYPE_INVALID)
die("Invalid RAMCODE.");
return &sdram_configs[ramcode];
}