6e09b3bde9
The I2C CLKs of SoC should be 400kHz, but waveform show 460kHz to 470kHz. Add I2C parameters to adjust I2C CLKs which 5% lower than 400kHz. BUG=b:78819970 TEST=The I2C CLKs are 5% lower than 400kHz. Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/26282 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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.. | ||
acpi | ||
spd | ||
variants | ||
acpi_tables.c | ||
board_info.txt | ||
bootblock.c | ||
chromeos.c | ||
chromeos.fmd | ||
dsdt.asl | ||
ec.c | ||
Kconfig | ||
Kconfig.name | ||
mainboard.c | ||
Makefile.inc | ||
ramstage.c | ||
romstage.c | ||
smihandler.c |