b4c5aed0a6
gpio_set_pull(), gpio_set_pull_pu_pd() and gpio_set_spec_pull_pupd() can be reused for mt8192, mt8195 and mt8186, so move it to new file "gpio_op.c" in common folder. TEST=build pass BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I81ab9b01ee20fccf3ef29c5902597b5045d3e36a Reviewed-on: https://review.coreboot.org/c/coreboot/+/65641 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
44 lines
743 B
C
44 lines
743 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/mmio.h>
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#include <gpio.h>
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#include <assert.h>
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void *gpio_find_reg_addr(gpio_t gpio)
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{
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void *reg_addr;
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switch (gpio.base & 0x0f) {
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case 0:
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reg_addr = (void *)IOCFG_RM_BASE;
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break;
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case 1:
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reg_addr = (void *)IOCFG_BM_BASE;
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break;
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case 2:
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reg_addr = (void *)IOCFG_BL_BASE;
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break;
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case 3:
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reg_addr = (void *)IOCFG_BR_BASE;
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break;
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case 4:
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reg_addr = (void *)IOCFG_LM_BASE;
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break;
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case 5:
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reg_addr = (void *)IOCFG_LB_BASE;
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break;
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case 6:
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reg_addr = (void *)IOCFG_RT_BASE;
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break;
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case 7:
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reg_addr = (void *)IOCFG_LT_BASE;
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break;
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case 8:
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reg_addr = (void *)IOCFG_TL_BASE;
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break;
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default:
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reg_addr = NULL;
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break;
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}
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return reg_addr;
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}
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