History

Martin Roth 122011453d util/bucts: Clean up Makefile to match others - Add a TARGET variable - Enable optimization and additional warnings - Add distclean target - Add help target Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I8eb190abd1ab20da7dd1ae43ef0358ba91df000e Reviewed-on: https://review.coreboot.org/c/coreboot/+/50847 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2021-02-25 10:03:00 +00:00
..
.gitignore	.gitignore: Ignore .test/.dependencies globally	2020-10-31 18:21:36 +00:00
Makefile	util/bucts: Clean up Makefile to match others	2021-02-25 10:03:00 +00:00
bucts.c	util/bucts: Fix compiler complaints shown with -Wextra	2021-02-25 10:02:53 +00:00
description.md	util/bucts: Add a description.md file	2018-12-18 13:24:56 +00:00
readme.md	util/bucts: Add tool to manipulate BUC.TS bit on Intel targets	2018-11-19 08:19:16 +00:00

readme.md

What is bucts?

Many Intel southbridges provide a mechanism called Back Up Control Top Swap (BUC.TS). This functionality allows to have the southbridge fetch the reset vector or the beginning of the bootblock at a 64K/128/256K offset from the usual top of flash.

This can be useful in different ways:

Have a backup bootblock in case of bootblock hacking;
Some vendor BIOS only write protect their bootblock so this tool makes it possible to circumvent this protection to allow flashing and booting coreboot.

The BUC.TS status is stored in a nvram bit. To clear it one has to remove the RTC battery.

Operation Description

First compile bucts by running make:

$ make

Then you can view the current system settings:

$ ./bucts --print

To flip the decode address of the bootblock, by setting BUC.TS to 1:

$ ./bucts --set

To set the behavior the regular mapping, by setting BUC.TS to 0

$ ./bucts --unset

Details

Example Bootblock size of 64KB (this is only configurable to be something else like 128 or 256K on PCH Intel targets).

    +-------------+ -> 0x200000         +-------------+ -> 0xFFFFFFFF       +-------------+ -> 0xFFFFFFFF
    |             |                     |             |                     |             |
    | bootblock_0 |                     | bootblock_0 |                     | bootblock_1 |
    |             |                     |             |                     |             |
    +-------------+ -> 0x1F0000         +-------------+ -> 0xFFFF0000       +-------------+ -> 0xFFFF0000
    |             |                     |             |                     |             |
    | bootblock_1 |                     | bootblock_1 |                     | bootblock_0 |
    |             |                     |             |                     |             |
    +-------------+ -> 0x1E0000         +-------------+ -> 0xFFFE0000       +-------------+ -> 0xFFFE0000
    |             |                     |             |                     |             |
    |             |                     |             |                     |             |
    Z             Z                     Z             Z                     Z             Z
    Z             Z                     Z             Z                     Z             Z
    |             |                     |             |                     |             |
    |             |                     |             |                     |             |
    FLASH (2M)                          Memory Map BUC.TS=0               Memory Map BUC.TS=1