coreboot-kgpe-d16/src/arch
Ronald G. Minnich 6f3a53b6f6 riscv: get SBI calls to work
SBI calls, as it turned out, were never right.
They did not set the stack correctly on traps.
They were not correctly setting the MIP instead of the SIP
(although this was not really well documented).
On Harvey, we were trying to avoid using them,
and due to a bug in SPIKE, our avoidance worked.
Once SPIKE was fixed, our avoidance broke.

This set of changes is tested and working with Harvey
which, for the first time, is making SBI calls.

It's not pretty and we're going to want to rework
trap_util.S in coming days.

Change-Id: Ibef530adcc58d33e2c44ff758e0b7d2acbdc5e99
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/18097
Tested-by: build bot (Jenkins)
2017-01-16 00:26:08 +01:00
..
arm buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
arm64 buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
mips build system: remove CBFSTOOL_PRE1_OPTS 2016-05-03 11:40:49 +02:00
power8 region: Add writeat and eraseat support 2016-06-24 20:48:12 +02:00
riscv riscv: get SBI calls to work 2017-01-16 00:26:08 +01:00
x86 arch/x86: fix cmos post logging in non romcc bootblock 2017-01-06 17:30:58 +01:00