6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
42 lines
1.1 KiB
C
42 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <southbridge/intel/common/acpi_pirq_gen.h>
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#include <southbridge/intel/common/rcba_pirq.h>
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#include <southbridge/intel/common/rcba.h>
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#define MAX_SLOT 31
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#define MIN_SLOT 19
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static const u32 pirq_dir_route_reg[MAX_SLOT - MIN_SLOT + 1] = {
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D19IR, D20IR, D21IR, D22IR, D23IR, 0, D25IR,
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D26IR, D27IR, D28IR, D29IR, D30IR, D31IR,
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};
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enum pirq intel_common_map_pirq(const struct device *dev, const enum pci_pin pci_pin)
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{
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u8 slot = PCI_SLOT(dev->path.pci.devfn);
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u8 shift = 4 * (pci_pin - PCI_INT_A);
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u8 pirq;
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u16 reg;
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if (pci_pin < PCI_INT_A || pci_pin > PCI_INT_D) {
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printk(BIOS_ERR, "ACPI_PIRQ_GEN: Slot %d PCI pin %d out of bounds\n",
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slot, pci_pin);
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return PIRQ_NONE;
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}
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/* Slot 24 should not exist and has no D24IR but better be safe here */
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if (slot < MIN_SLOT || slot > MAX_SLOT || slot == 24) {
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/* non-PCH devices use 1:1 mapping. */
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return (enum pirq)pci_pin;
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}
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reg = pirq_dir_route_reg[slot - MIN_SLOT];
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pirq = (RCBA16(reg) >> shift) & 0x7;
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return (enum pirq)(PIRQ_A + pirq);
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}
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