coreboot-kgpe-d16/src/northbridge/intel
Angel Pons 6fe3c06614 nb/intel/haswell/finalize.c: Align MC locking with Broadwell
Broadwell uses a 32-bit or, so also use it on Haswell for consistency.
This has no effect because MRC already locks the memory controller down.

Tested on Asrock B85M Pro4, still boots and register is still locked.

Change-Id: Ida69cd9a95a658c24b4d2558dde88b94c167a3f9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46681
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-24 20:47:27 +00:00
..
e7505 src/northbridge: Drop unneeded empty lines 2020-09-21 16:32:10 +00:00
gm45 nb/intel/gm45: Clean up header handling 2020-10-24 20:42:32 +00:00
haswell nb/intel/haswell/finalize.c: Align MC locking with Broadwell 2020-10-24 20:47:27 +00:00
i440bx nb/intel/i440bx: Make ROM area unavailable for MMIO 2020-08-04 07:14:43 +00:00
i945 nb/intel/i945/acpi: Convert i945.asl to ASL 2.0 syntax 2020-10-12 14:41:54 +00:00
ironlake nb/intel/ironlake: Add more host bridge PCI IDs 2020-10-24 16:30:42 +00:00
pineview nb/intel/pineview: Place raminit definitions in raminit.h 2020-09-25 19:42:43 +00:00
sandybridge nb/intel/sandybridge: Correct designation of MRC version 2020-10-23 18:10:20 +00:00
x4x nb/intel/x4x: Place raminit definitions in raminit.h 2020-10-14 09:19:22 +00:00