704b59662d
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
84 lines
1.9 KiB
Text
84 lines
1.9 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2009 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if BOARD_INTEL_D945GCLF
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_INTEL_ATOM_230
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select CPU_INTEL_SOCKET_441
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select NORTHBRIDGE_INTEL_I945
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select SOUTHBRIDGE_INTEL_I82801GX
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select SUPERIO_SMSC_LPC47M15X
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select BOARD_HAS_FADT
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select GENERATE_ACPI_TABLES
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select GENERATE_PIRQ_TABLE
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select GENERATE_MP_TABLE
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select HAVE_OPTION_TABLE
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select HAVE_HARD_RESET
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_RESUME
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select HAVE_MAINBOARD_RESOURCES
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select MMCONF_SUPPORT
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select HAVE_ACPI_TABLES
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select HAVE_SMI_HANDLER
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select BOARD_ROMSIZE_KB_512
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select CACHE_AS_RAM
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select GFXUMA
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select TINY_BOOTBLOCK
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config MAINBOARD_DIR
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string
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default intel/d945gclf
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config DCACHE_RAM_BASE
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hex
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default 0xffdf8000
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config DCACHE_RAM_SIZE
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hex
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default 0x8000
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config MAINBOARD_PART_NUMBER
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string
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default "D945GCLF"
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x464C
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config MMCONF_BASE_ADDRESS
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hex
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default 0xf0000000
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config IRQ_SLOT_COUNT
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int
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default 18
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config MAX_CPUS
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int
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default 4
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config MAX_PHYSICAL_CPUS
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int
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default 2
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endif # BOARD_INTEL_D945GCLF
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