Elyes Haouas b433470b02 soc/cavium/cn81xx: Use write{32,64}p() ... Change-Id: I9c94f45264f541ce0849a53245534a10aaa5d854 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>		2022-12-13 14:26:23 +00:00
..
include
bl31_plat_params.c
bootblock.c
bootblock_custom.S
cbmem.c	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00
chip.h
clock.c	soc/cavium/cn81xx: Use read64p()	2022-12-06 19:44:06 +00:00
cpu.c	soc/cavium/cn81xx: Use write{32,64}p()	2022-12-13 14:26:23 +00:00
cpu_secondary.S
ecam0.c
gpio.c
Kconfig
Makefile.inc
memlayout.ld
mmu.c
sdram.c
soc.c	soc/cavium,ti: Do resource transition	2022-06-29 11:55:01 +00:00
spi.c
timer.c
twsi.c	src/soc/cavium: Remove unnecessary space after casts	2022-11-22 13:43:41 +00:00
uart.c