a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
75 lines
2 KiB
C
75 lines
2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include "sb800.h"
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static void ide_init(struct device *dev)
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{
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struct southbridge_amd_sb800_config *conf;
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/* Enable ide devices so the linux ide driver will work */
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u32 dword;
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u8 byte;
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conf = dev->chip_info;
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/* RPR9.1 disable MSI */
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/* TODO: For A14, it should set as 1. I doubt it. */
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dword = pci_read_config32(dev, 0x70);
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dword &= ~(1 << 16);
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pci_write_config32(dev, 0x70, dword);
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/* Ultra DMA mode */
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/* enable UDMA */
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byte = pci_read_config8(dev, 0x54);
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byte |= 1 << 0;
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pci_write_config8(dev, 0x54, byte);
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/* Enable I/O Access&& Bus Master */
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dword = pci_read_config16(dev, 0x4);
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dword |= 1 << 2;
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pci_write_config16(dev, 0x4, dword);
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/* set ide as primary, if you want to boot from IDE, you'd better set it
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* in mainboard/Config.lb */
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if (conf->boot_switch_sata_ide == 1) {
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byte = pci_read_config8(dev, 0xAD);
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byte |= 1 << 4;
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pci_write_config8(dev, 0xAD, byte);
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}
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}
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static struct pci_operations lops_pci = {
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.set_subsystem = pci_dev_set_subsystem,
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};
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static struct device_operations ide_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = ide_init,
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.scan_bus = 0,
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.ops_pci = &lops_pci,
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};
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static const struct pci_driver ide_driver __pci_driver = {
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.ops = &ide_ops,
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.vendor = PCI_VENDOR_ID_ATI,
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.device = PCI_DEVICE_ID_ATI_SB800_IDE,
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};
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