a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
108 lines
3.5 KiB
Text
108 lines
3.5 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2011-2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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##
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## This program is free software: you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation, either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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chip northbridge/via/vx900 # Northbridge
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register "assign_pex_to_dp" = "0"
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register "pcie_port1_2_lane_wide" = "1"
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register "ext_int_route_to_pirq" = "'H'"
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device cpu_cluster 0 on # APIC cluster
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chip cpu/via/nano # VIA NANO
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device lapic 0 on end # APIC
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end
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end
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device domain 0 on
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device pci 0.0 on end # [0410] Host controller
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device pci 0.1 on end # [1410] Error Reporting
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device pci 0.2 on end # [2410] CPU Bus Control
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device pci 0.3 on end # [3410] DRAM Bus Control
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device pci 0.4 on end # [4410] Power Management
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device pci 0.5 on # [5410] APIC+Traffic Control
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "0"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfecc0000"
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device ioapic 2 on end
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end
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end
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device pci 0.6 off end # [6410] Scratch Registers
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device pci 0.7 on end # [7410] V4 Link Control
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device pci 1.0 on # [7122] VGA Chrome9 HD
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ioapic_irq 2 INTA 0x28
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end
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device pci 1.1 on # [9170] Audio Device
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ioapic_irq 2 INTA 0x29
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end
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device pci 3.0 on end # [a410] PEX1
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device pci 3.1 on end # [b410] PEX2
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device pci 3.2 on end # [c410] PEX3
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device pci 3.3 on end # [d410] PEX4
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device pci 3.4 on end # [e410] PCIE bridge
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device pci b.0 on end # [a409] USB Device
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device pci c.0 off end # [95d0] SDIO Host Controller
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device pci d.0 off end # [9530] Memory Card controller
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device pci f.0 on # [9001] SATA Controller
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ioapic_irq 1 INTA 0x15
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end
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device pci 10.0 on end # [3038] USB 1.1
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device pci 10.1 on end # [3038] USB 1.1
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device pci 10.2 on end # [3038] USB 1.1
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device pci 10.3 on end # [3038] USB 1.1
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device pci 10.4 on end # [3104] USB 2.0
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device pci 11.0 on # [8410] LPC Bus Control
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 1 on end
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end
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#chip drivers/generic/generic # DIMM 0 channel 1
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# device i2c 50 on end
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#end
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#chip drivers/generic/generic # DIMM 1 channel 1
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# device i2c 51 on end
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#end
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chip superio/fintek/f81865f # Super duper IO
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device pnp 4e.0 off end # Floppy
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device pnp 4e.3 off end # Parallel Port
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device pnp 4e.4 off end # Hardware Monitor
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device pnp 4e.5 off end # Keyboard not here
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device pnp 4e.6 off end # GPIO
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device pnp 4e.a off end # PME
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device pnp 4e.10 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 4e.11 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 4e.12 on # COM3
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io 0x60 = 0x3e8
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irq 0x70 = 10
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end
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device pnp 4e.13 on # COM4
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io 0x60 = 0x2e8
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irq 0x70 = 11
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end
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end # superio/fintek/f81865f
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end # LPC
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device pci 11.7 on end # [a353] North-South control
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device pci 14.0 on end # [3288] Azalia HDAC
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end
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end
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