916e2efad4
DPM is a hardware module for DRAM power management and for better power saving in low power mode. BUG=none TEST=Boots correctly on Asurada Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Change-Id: I16b341ad63940b45b886c4a7fd733c1970624e40 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46393 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
48 lines
996 B
C
48 lines
996 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/mmio.h>
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#include <soc/dpm.h>
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#include <soc/mcu_common.h>
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#include <soc/symbols.h>
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static void reset_dpm(struct mtk_mcu *mcu)
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{
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/* write bootargs */
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write32(&mtk_dpm->twam_window_len, 0x0);
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write32(&mtk_dpm->twam_mon_type, 0x0);
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/* free RST */
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setbits32(&mtk_dpm->sw_rstn, DPM_SW_RSTN_RESET);
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}
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static struct mtk_mcu dpm_mcu[] = {
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{
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.firmware_name = CONFIG_DPM_DM_FIRMWARE,
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.run_address = (void *)DPM_DM_SRAM_BASE,
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},
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{
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.firmware_name = CONFIG_DPM_PM_FIRMWARE,
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.run_address = (void *)DPM_PM_SRAM_BASE,
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.reset = reset_dpm,
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},
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};
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int dpm_init(void)
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{
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int i;
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struct mtk_mcu *dpm;
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/* config DPM SRAM layout */
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clrsetbits32(&mtk_dpm->sw_rstn, DPM_MEM_RATIO_MASK, DPM_MEM_RATIO_CFG1);
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for (i = 0; i < ARRAY_SIZE(dpm_mcu); i++) {
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dpm = &dpm_mcu[i];
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dpm->load_buffer = _dram_dma;
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dpm->buffer_size = REGION_SIZE(dram_dma);
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if (mtk_init_mcu(dpm))
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return -1;
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}
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return 0;
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}
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