7ee05eddf1
In order to support booting a GNU/Linux payload on non x86, the FIT format should be used, as it is the defacto standard on ARM. Due to greater complexity of FIT it is not converted to simple ELF format. Add support for autodecting FIT payloads and add them as new CBFS_TYPE 'fit'. The payload is included as is, with no special header. The code can determine the type at runtime using the CBFS_TYPE field. Support for parsing FIT payloads in coreboot is added in a follow on commit. Compression of FIT payloads is not supported, as the FIT sections might be compressed itself. Starting at this point a CBFS payload/ can be either of type FIT or SELF. Tested on Cavium SoC. Change-Id: Ic5fc30cd5419eb76c4eb50cca3449caea60270de Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/25860 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> |
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| .. | ||
| accessors | ||
| cli | ||
| COPYING | ||
| ChangeLog | ||
| DISCLAIMER | ||
| Makefile | ||
| Makefile.inc | ||
| README | ||
| cbfs.c | ||
| cbfs.h | ||
| cmos_lowlevel.c | ||
| cmos_lowlevel.h | ||
| cmos_ops.c | ||
| cmos_ops.h | ||
| common.c | ||
| common.h | ||
| compute_ip_checksum.c | ||
| coreboot_tables.h | ||
| hexdump.c | ||
| hexdump.h | ||
| input_file.c | ||
| input_file.h | ||
| ip_checksum.h | ||
| layout.c | ||
| layout.h | ||
| lbtable.c | ||
| lbtable.h | ||
| nvramtool.spec | ||
| reg_expr.c | ||
| reg_expr.h | ||
| win32mmap.c | ||
README
Summary of Operation
--------------------
nvramtool is a utility for reading/writing coreboot parameters and
displaying information from the coreboot table. It is intended for x86-based
systems (both 32-bit and 64-bit) that use coreboot.
The coreboot table resides in low physical memory, and may be accessed
through the /dev/mem interface. It is created at boot time by coreboot, and
contains various system information such as the type of mainboard in use. It
specifies locations in the CMOS (nonvolatile RAM) where the coreboot
parameters are stored.
For information about coreboot, see https://www.coreboot.org/.
Ideas for Future Improvements
-----------------------------
1. Move the core functionality of this program into a shared library.
2. Consider adding options for displaying other BIOS-provided information
such as the MP table, ACPI table, PCI IRQ routing table, etc.