Tim Wawrzynczak 72d94026ce soc/intel/tigerlake: Switch to runtime generation of Intel Power Engine ... The pep.asl file is being obsoleted by runtime generation, therefore switch tigerlake boards to this method. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I8e97c589273e934e89d69d8829680b9cac1ff9f5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56007 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2021-09-10 21:54:01 +00:00
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alderlake	soc/intel/alderlake: Switch to runtime generation of Intel Power Engine	2021-09-10 21:53:32 +00:00
apollolake	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
baytrail	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
braswell	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
broadwell	soc/intel/broadwell: Set FADT duty_offset to 0	2021-09-09 14:37:42 +00:00
cannonlake	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
common	soc/intel/common/block/acpi: Add LPM requirements support to PEPD _DSM	2021-09-10 20:56:54 +00:00
denverton_ns	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
elkhartlake	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
icelake	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
jasperlake	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
quark	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
skylake	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
tigerlake	soc/intel/tigerlake: Switch to runtime generation of Intel Power Engine	2021-09-10 21:54:01 +00:00
xeon_sp	mb/ocp: Remove superfluous FSP header CPP inclusion	2021-09-09 14:41:07 +00:00
Kconfig