coreboot-kgpe-d16/src/northbridge
Carl-Daniel Hailfinger 734d09e05b First part of heterogenous dualchannel support.
Do not allow non-identical DIMMs yet, but prepare the code.

Calculate tCL related settings per DIMM in a dual channel setup. The
check for compatibility will come in a later patch, but since DIMMs
still have to be identical, this does not hurt.

Factor out tRC calculation to prepare for per-DIMM calculation.

Add diagnostic messages to tRC code.

Test booted to FILO, behaviour is identical if you ignore the added
debug messages (which are switched off by default).

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-16 03:44:41 +00:00
..
amd First part of heterogenous dualchannel support. 2009-01-16 03:44:41 +00:00
ibm Use the canonical name of the vendors/devices and the 2006-11-05 18:50:49 +00:00
intel Fix a LOT of implicit function declarations before they become errors. 2008-12-19 03:36:48 +00:00
motorola/mpc107 Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
via Fix implicit declaration in cn700/vt8237 code 2008-12-18 19:37:11 +00:00