7843bd560e
There is some overlap between things done in bootblock and romstage like setting BARs. Change-Id: Icd1de34c3b5c0f36f2a5249116d1829ee3956f38 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36759 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright (C) 2018 Arthur Heymans <arthur@aheymans.xyz>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <bootblock_common.h>
|
|
#include <southbridge/intel/i82801jx/i82801jx.h>
|
|
#include <northbridge/intel/x4x/x4x.h>
|
|
#include <superio/winbond/w83667hg-a/w83667hg-a.h>
|
|
#include <superio/winbond/common/winbond.h>
|
|
|
|
#define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
|
|
|
|
void bootblock_mainboard_early_init(void)
|
|
{
|
|
/* TODO? */
|
|
RCBA32(RCBA_CG) = 0xbf7f001f;
|
|
RCBA32(0x3430) = 0x00000002;
|
|
RCBA32(0x3f00) = 0x00000038;
|
|
|
|
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
|
|
}
|
|
|
|
void mb_get_spd_map(u8 spd_map[4])
|
|
{
|
|
spd_map[0] = 0x50;
|
|
spd_map[1] = 0x51;
|
|
spd_map[2] = 0x52;
|
|
spd_map[3] = 0x53;
|
|
}
|