Angel Pons 7383318856 nb/intel/pineview: Drop MCHBAR macro from DMIBAR access ... While the macro value is the same, the DMIBAR register is not HTBONUS1. Tested with BUILD_TIMELESS=1, Foxconn D41S remains identical. Change-Id: I5025f115f5a55dc782092989f3d158802d1d9353 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51858 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-28 18:01:26 +00:00
..
common	nb/intel/common/fixed_bars.h: Add casts to uintptr_t	2021-02-12 07:52:37 +00:00
e7505	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
gm45	nb/intel: Add missing <types.h>	2021-02-16 20:56:56 +00:00
haswell	nb/intel/haswell: Replace DMIBAR64 and EPBAR64	2021-03-28 18:00:49 +00:00
i440bx	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
i945	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00
ironlake	nb/intel/ironlake/quickpath.c: Correct one value	2021-03-28 18:01:15 +00:00
pineview	nb/intel/pineview: Drop MCHBAR macro from DMIBAR access	2021-03-28 18:01:26 +00:00
sandybridge	nb/intel/sandybridge: Clean up dram_timing function	2021-03-01 08:31:44 +00:00
x4x	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00