58c3938705
This patch attempts to finish the separation between CONFIG_VBOOT and CONFIG_CHROMEOS by moving the remaining options and code (including image generation code for things like FWID and GBB flags, which are intrinsic to vboot itself) from src/vendorcode/google/chromeos to src/vboot. Also taking this opportunity to namespace all VBOOT Kconfig options, and clean up menuconfig visibility for them (i.e. some options were visible even though they were tied to the hardware while others were invisible even though it might make sense to change them). CQ-DEPEND=CL:459088 Change-Id: I3e2e31150ebf5a96b6fe507ebeb53a41ecf88122 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18984 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
81 lines
1.7 KiB
Text
81 lines
1.7 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SOC_BROADCOM_CYGNUS
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bool
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default n
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select ARCH_BOOTBLOCK_ARMV7
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select ARCH_RAMSTAGE_ARMV7
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select ARCH_ROMSTAGE_ARMV7
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select ARCH_VERSTAGE_ARMV7
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select BOOTBLOCK_CONSOLE
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select GENERIC_UDELAY
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select HAVE_MONOTONIC_TIMER
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select HAVE_UART_SPECIAL
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select GENERIC_GPIO_LIB
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if SOC_BROADCOM_CYGNUS
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config VBOOT
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select VBOOT_STARTS_IN_BOOTBLOCK
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select VBOOT_SEPARATE_VERSTAGE
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select VBOOT_RETURN_FROM_VERSTAGE
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config CONSOLE_SERIAL_UART_ADDRESS
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hex
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depends on DRIVERS_UART
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default 0x18023000
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config CYGNUS_DDR333
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def_bool n
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config CYGNUS_DDR400
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def_bool n
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config CYGNUS_DDR533
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def_bool n
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config CYGNUS_DDR667
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def_bool n
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config CYGNUS_DDR800
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bool "DDR Speed at 800MHz"
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default y
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config CYGNUS_DDR_AUTO_SELF_REFRESH_ENABLE
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bool "Enable DDR auto self-refresh"
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default y
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help
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Warning: M0 expects that auto self-refresh is enabled. Modify
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with caution.
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config CYGNUS_SHMOO_REUSE_DDR_32BIT
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bool "Indicate if DDR width is 32-bit"
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default n
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config CYGNUS_SDRAM_TEST_DDR
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bool "Run a write-read test on DDR after initialization"
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default n
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config CYGNUS_PRINT_SHMOO_DEBUG
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bool "Print debug info for shmoo"
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default n
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config CYGNUS_GPIO_TEST
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bool "Run a test on gpio"
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default n
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endif
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