coreboot-kgpe-d16/src
Shunqian Zheng 74bb412753 rockchip/rk3399: Fix pinctrl pull bias settings
The pull bias settings for GPIO0_A, GPIO0_B, GPIO2_C and GPIO2_D
are different from the other GPIO banks.

This patch adds a callback function to get the GPIO pull value
of each SoC(rk3288 and rk3399) so we can still use the common
GPIO driver.

BRANCH=none
BUG=chrome-os-partner:53251
TEST=Jerry and Gru still boot

Change-Id: I2a00b7ffd2699190582f5f50a1e21b61c500bf4f
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 46d5fa7297693216a2da9bcf15ccce4af796e80e
Original-Change-Id: If53f47181bdc235a1ccfefeeb2a77e0eb0e3b1ca
Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/358110
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15587
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-12 00:28:33 +02:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch acpi: Change device properties to work as a tree 2016-07-08 17:21:26 +02:00
commonlib region: Add writeat and eraseat support 2016-06-24 20:48:12 +02:00
console console/post: be explicit about conditional cmos_post_log() compiling 2016-05-25 18:04:11 +02:00
cpu intel post-car: Consolidate choose_top_of_stack() 2016-07-10 11:16:07 +02:00
device device: i2c: Add support for I2C bus operations 2016-06-09 17:05:40 +02:00
drivers tpm: report firmware version 2016-07-12 00:26:42 +02:00
ec google/chromeec: Update EC command header 2016-07-10 03:54:07 +02:00
include vboot2: tpm2 factory initialization. 2016-07-12 00:27:27 +02:00
lib tpm2: add marshaling/unmarshaling layer 2016-07-11 23:52:56 +02:00
mainboard google/gru: Read RAM & board ids from the ADC 2016-07-12 00:28:22 +02:00
northbridge nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAM 2016-07-09 13:49:00 +02:00
soc rockchip/rk3399: Fix pinctrl pull bias settings 2016-07-12 00:28:33 +02:00
southbridge PCI: Use PCI_DEVFN macro instead of DEV_FUNC 2016-07-06 21:58:09 +02:00
superio sio/winbond/w83667hg-a: Add pinmux defines for UART B 2016-05-29 19:34:54 +02:00
vendorcode vboot2: tpm2 factory initialization. 2016-07-12 00:27:27 +02:00
Kconfig Romstage spinlocks require EARLY_CBMEM_INIT 2016-07-10 04:03:31 +02:00