199 lines
7.4 KiB
C
199 lines
7.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM64_MMU_H__
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#define __ARCH_ARM64_MMU_H__
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#include <libpayload.h>
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struct mmu_memrange {
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uint64_t base;
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uint64_t size;
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uint64_t type;
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};
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struct mmu_ranges {
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struct mmu_memrange entries[SYSINFO_MAX_MEM_RANGES];
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size_t used;
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};
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/*
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* Symbols taken from linker script
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* They mark the start and end of the region used by payload
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*/
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extern char _start[], _end[];
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/* Memory attributes for mmap regions
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* These attributes act as tag values for memrange regions
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*/
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#define TYPE_NORMAL_MEM 1
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#define TYPE_DEV_MEM 2
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#define TYPE_DMA_MEM 3
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/* Descriptor attributes */
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#define INVALID_DESC 0x0
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#define BLOCK_DESC 0x1
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#define TABLE_DESC 0x3
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#define PAGE_DESC 0x3
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/* Block descriptor */
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#define BLOCK_NS (1 << 5)
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#define BLOCK_AP_RW (0 << 7)
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#define BLOCK_AP_RO (1 << 7)
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#define BLOCK_ACCESS (1 << 10)
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#define BLOCK_XN (1UL << 54)
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#define BLOCK_SH_SHIFT (8)
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#define BLOCK_SH_NON_SHAREABLE (0 << BLOCK_SH_SHIFT)
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#define BLOCK_SH_UNPREDICTABLE (1 << BLOCK_SH_SHIFT)
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#define BLOCK_SH_OUTER_SHAREABLE (2 << BLOCK_SH_SHIFT)
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#define BLOCK_SH_INNER_SHAREABLE (3 << BLOCK_SH_SHIFT)
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/* XLAT Table Init Attributes */
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#define VA_START 0x0
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#define BITS_PER_VA 48
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#define MIN_64_BIT_ADDR (1UL << 32)
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/* Granule size of 4KB is being used */
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#define GRANULE_SIZE_SHIFT 12
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#define GRANULE_SIZE (1 << GRANULE_SIZE_SHIFT)
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#define XLAT_TABLE_MASK (~(0UL) << GRANULE_SIZE_SHIFT)
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#define GRANULE_SIZE_MASK ((1 << GRANULE_SIZE_SHIFT) - 1)
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#define BITS_RESOLVED_PER_LVL (GRANULE_SIZE_SHIFT - 3)
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#define L0_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 3)
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#define L1_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 2)
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#define L2_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 1)
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#define L3_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 0)
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#define L0_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L0_ADDR_SHIFT)
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#define L1_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L1_ADDR_SHIFT)
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#define L2_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L2_ADDR_SHIFT)
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#define L3_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L3_ADDR_SHIFT)
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/* These macros give the size of the region addressed by each entry of a xlat
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table at any given level */
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#define L3_XLAT_SIZE (1UL << L3_ADDR_SHIFT)
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#define L2_XLAT_SIZE (1UL << L2_ADDR_SHIFT)
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#define L1_XLAT_SIZE (1UL << L1_ADDR_SHIFT)
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#define L0_XLAT_SIZE (1UL << L0_ADDR_SHIFT)
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/* Block indices required for MAIR */
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#define BLOCK_INDEX_MEM_DEV_NGNRNE 0
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#define BLOCK_INDEX_MEM_DEV_NGNRE 1
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#define BLOCK_INDEX_MEM_DEV_GRE 2
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#define BLOCK_INDEX_MEM_NORMAL_NC 3
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#define BLOCK_INDEX_MEM_NORMAL 4
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#define BLOCK_INDEX_SHIFT 2
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/* MAIR attributes */
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#define MAIR_ATTRIBUTES ((0x00 << (BLOCK_INDEX_MEM_DEV_NGNRNE*8)) | \
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(0x04 << (BLOCK_INDEX_MEM_DEV_NGNRE*8)) | \
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(0x0c << (BLOCK_INDEX_MEM_DEV_GRE*8)) | \
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(0x44 << (BLOCK_INDEX_MEM_NORMAL_NC*8)) | \
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(0xffUL << (BLOCK_INDEX_MEM_NORMAL*8)))
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/* TCR attributes */
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#define TCR_TOSZ (64 - BITS_PER_VA)
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#define TCR_IRGN0_SHIFT 8
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#define TCR_IRGN0_NM_NC (0x00 << TCR_IRGN0_SHIFT)
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#define TCR_IRGN0_NM_WBWAC (0x01 << TCR_IRGN0_SHIFT)
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#define TCR_IRGN0_NM_WTC (0x02 << TCR_IRGN0_SHIFT)
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#define TCR_IRGN0_NM_WBNWAC (0x03 << TCR_IRGN0_SHIFT)
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#define TCR_ORGN0_SHIFT 10
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#define TCR_ORGN0_NM_NC (0x00 << TCR_ORGN0_SHIFT)
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#define TCR_ORGN0_NM_WBWAC (0x01 << TCR_ORGN0_SHIFT)
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#define TCR_ORGN0_NM_WTC (0x02 << TCR_ORGN0_SHIFT)
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#define TCR_ORGN0_NM_WBNWAC (0x03 << TCR_ORGN0_SHIFT)
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#define TCR_SH0_SHIFT 12
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#define TCR_SH0_NC (0x0 << TCR_SH0_SHIFT)
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#define TCR_SH0_OS (0x2 << TCR_SH0_SHIFT)
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#define TCR_SH0_IS (0x3 << TCR_SH0_SHIFT)
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#define TCR_TG0_SHIFT 14
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#define TCR_TG0_4KB (0x0 << TCR_TG0_SHIFT)
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#define TCR_TG0_64KB (0x1 << TCR_TG0_SHIFT)
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#define TCR_TG0_16KB (0x2 << TCR_TG0_SHIFT)
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#define TCR_PS_SHIFT 16
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#define TCR_PS_4GB (0x0 << TCR_PS_SHIFT)
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#define TCR_PS_64GB (0x1 << TCR_PS_SHIFT)
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#define TCR_PS_1TB (0x2 << TCR_PS_SHIFT)
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#define TCR_PS_4TB (0x3 << TCR_PS_SHIFT)
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#define TCR_PS_16TB (0x4 << TCR_PS_SHIFT)
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#define TCR_PS_256TB (0x5 << TCR_PS_SHIFT)
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#define TCR_TBI_SHIFT 20
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#define TCR_TBI_USED (0x0 << TCR_TBI_SHIFT)
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#define TCR_TBI_IGNORED (0x1 << TCR_TBI_SHIFT)
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#define DMA_DEFAULT_SIZE (32 * MiB)
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#define TTB_DEFAULT_SIZE 0x100000
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#define MB_SIZE (1UL << 20)
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/* Initialize the MMU TTB tables using the mmu_ranges */
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uint64_t mmu_init(struct mmu_ranges *mmu_ranges);
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/* Enable the mmu based on previous mmu_init(). */
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void mmu_enable(void);
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/* Disable mmu */
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void mmu_disable(void);
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/* Change a memory type for a range of bytes at runtime. */
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void mmu_config_range(void *start, size_t size, uint64_t tag);
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/*
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* Based on the memory ranges provided in coreboot tables,
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* initialize the mmu_memranges used for mmu initialization
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* cb_ranges -> Memory ranges present in cb tables
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* mmu_ranges -> mmu_memranges initialized by this function
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*/
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struct mmu_memrange* mmu_init_ranges_from_sysinfo(struct memrange *cb_ranges,
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uint64_t ncb,
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struct mmu_ranges *mmu_ranges);
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/*
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* Functions for handling the initialization of memory ranges and enabling mmu
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* before coreboot tables are parsed
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*/
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void mmu_presysinfo_memory_used(uint64_t base, uint64_t size);
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void mmu_presysinfo_enable(void);
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#endif // __ARCH_ARM64_MMU_H__
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