coreboot-kgpe-d16/src/cpu/x86
Aaron Durbin 76c3700f02 haswell: Add initial support for Haswell platforms
The Haswell parts use a PCH code named Lynx Point (Series 8). Therefore,
the southbridge support is included as well. The basis for this code is
the Sandybridge code. Management Engine, IRQ routing, and ACPI still requires
more attention, but this is a good starting point.

This code partially gets up through the romstage just before training
memory on a Haswell reference board.

Change-Id: If572d6c21ca051b486b82a924ca0ffe05c4d0ad4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2616
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 01:44:40 +01:00
..
16bit Revert wbind added to the reset_vector 2012-04-20 09:09:42 +02:00
32bit Remove whitespace. 2012-02-17 19:04:31 +01:00
cache post code: Replaced hard-coded post code with macro 2012-01-23 22:50:56 +01:00
lapic GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
mtrr Intel Sandybridge: add reserved memory as resources 2012-08-01 10:57:17 +02:00
name GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
pae Revert "Use broadcast SIPI to startup siblings" 2012-07-31 06:46:02 +02:00
smm haswell: Add initial support for Haswell platforms 2013-03-14 01:44:40 +01:00
tsc Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
fpu_enable.inc GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
Kconfig Remove AMD special case for LAPIC based udelay() 2012-11-27 23:51:52 +01:00
sse_enable.inc GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00