Chun-Jie Chen 76e0b9d710 soc/mediatek/mt8186: Add PLL and clock init support ... Add PLL and clock init code, frequency meter and APIs for raising little CPU/CCI frequency. TEST=build pass BUG=b:202871018 Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Change-Id: Id46d0708e7ba0c1a4043a5dce33ef69421cb59c5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58936 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>		2021-11-05 13:03:10 +00:00
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common	soc/mediatek: Add an overridable function for WDT clear status	2021-11-03 18:51:24 +00:00
mt8173	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
mt8183	soc/mediatek: add debug dump for ltiming and clock_div	2021-10-02 11:50:22 +00:00
mt8186	soc/mediatek/mt8186: Add PLL and clock init support	2021-11-05 13:03:10 +00:00
mt8192	soc/mediatek/mt8192: add tracker dump	2021-10-13 13:58:01 +00:00
mt8195	soc/mediatek: Add an overridable function for WDT clear status	2021-11-03 18:51:24 +00:00
Kconfig	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00