Angel Pons 77653e3bce src: Drop useless GPE1 settings from FADT ... None of the currently-supported chips has a GPE1 block. The ACPI spec, version 6.3, section 4.8.1.6 (General-Purpose Event Registers) says: If a generic register block is not supported then its respective block pointer and block length values in the FADT table contain zeros. Since the FADT struct defaults to zero in coreboot, we don't need to do anything with GPE1 for now. So, drop the unneeded writes to GPE1 fields. Tested on Asus P8Z77-V LX2 with Linux 5.7.6 and Windows 10 at the end of the patch train, both operating systems are able to boot successfully. Change-Id: Iefc4bbc6e16fac12e0a9324d5a50b20aad59a6cd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43379 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-07-20 13:15:45 +00:00
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common	soc/amd/common/gpio: Add macro for PAD_NC	2020-07-17 18:30:20 +00:00
picasso	src: Drop useless GPE1 settings from FADT	2020-07-20 13:15:45 +00:00
stoneyridge	src: Drop useless GPE1 settings from FADT	2020-07-20 13:15:45 +00:00
Kconfig	soc/amd: Add picasso to Kconfig	2019-07-02 14:33:42 +00:00