f555a58abc
This avoids including platform-specific headers with different filenames from common code. Change-Id: Idf9893e55949d63f3ceca2249e618d0f81320321 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38232 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/pci_ops.h>
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#include <device/pci_def.h>
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#include <device/smbus_host.h>
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#include "pch.h"
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uintptr_t smbus_base(void)
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{
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return SMBUS_IO_BASE;
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}
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int smbus_enable_iobar(uintptr_t base)
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{
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/* Set the SMBus device statically. */
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pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
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/* Check to make sure we've got the right device. */
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if (pci_read_config16(dev, 0x0) != 0x8086)
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return -1;
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/* Set SMBus I/O base. */
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pci_write_config32(dev, SMB_BASE,
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base | PCI_BASE_ADDRESS_SPACE_IO);
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/* Set SMBus enable. */
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pci_write_config8(dev, HOSTC, HST_EN);
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/* Set SMBus I/O space enable. */
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pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
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return 0;
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}
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int smbus_read_byte(unsigned int device, unsigned int address)
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{
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return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
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}
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