6911219ccc
Coreboot and most payloads support three basic pixel widths for the framebuffer. It assumes 32 by default, but several chipsets need to override that value with whatever else they're supporting. Our struct edid contains multiple convenience values that are directly derived from this (and other properties), so changing the bits per pixel always requires recalculating all those dependents in the chipset code. This patch provides a small convenience wrapper that can be used to consistently update the whole struct edid with a new pixel width instead, so we no longer need to duplicate those calculations everywhere. BUG=None TEST=Booted Oak in all three pixel widths (which it conveniently all supports), confirmed that images looked good. Change-Id: I5376dd4e28cf107ac2fba1dc418f5e1c5a2e2de6 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/14158 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> |
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.. | ||
include/soc | ||
bootblock.c | ||
cbmem.c | ||
chip.h | ||
clock.c | ||
crypto.c | ||
display.c | ||
edp.c | ||
gpio.c | ||
hdmi.c | ||
i2c.c | ||
Kconfig | ||
Makefile.inc | ||
pwm.c | ||
rk808.c | ||
sdram.c | ||
soc.c | ||
software_i2c.c | ||
spi.c | ||
timer.c | ||
tsadc.c | ||
uart.c | ||
vop.c |