Kyösti Mälkki 780935687d pcengines/apu1: Implement board GPIOs ... Some GPIO pins are shared with (disabled) PCI bridge 0:14.4. As our PCI subsystem currently does not configure PCI bridges that are marked disabled, but remain visible in the hardware, we cannot mark 0:14.4 disabled in devicetree just yet. Change-Id: Ibc5d950662d633a07d62fd5a5984a56d8e5f959d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8326 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>		2015-02-23 21:34:55 +01:00
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alix1c	mainboard/cmos: Kill off unused boot_* parameters	2015-02-16 09:24:14 +01:00
alix2c	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	2014-05-03 00:25:20 +02:00
alix2d	mainboard/cmos: Kill off unused boot_* parameters	2015-02-16 09:24:14 +01:00
alix6	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	2014-05-03 00:25:20 +02:00
apu1	pcengines/apu1: Implement board GPIOs	2015-02-23 21:34:55 +01:00
Kconfig	pcengines/apu1: New board PC Engines APU1	2015-02-23 21:34:21 +01:00