coreboot-kgpe-d16/src/include/cpu
Patrick Georgi 784544b934 Remove XIP_ROM_BASE
The base is now calculated automatically, and all mentions of that
config option were typical anyway (4GB - XIP_ROM_SIZE).

Change-Id: Icdf908dc043719f3810f7b5b85ad9938f362ea40
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/366
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-11-01 19:06:23 +01:00
..
amd Build warning fix for AMD Family 12 2011-09-15 19:55:35 +02:00
intel cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. 2011-08-04 08:10:12 +02:00
x86 Remove XIP_ROM_BASE 2011-11-01 19:06:23 +01:00
cpu.h more ifdef -> if fixes 2011-04-21 20:45:45 +00:00