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Ivy Jian 78c4d0f6a6 soc/intel/meteorlake: Enable tbtPcie2/3
Adding support enables/disables tbtPcie2/3 by usb4_params.

BUG=b:244687646
TEST= TRP2/3 are enabled as expected.
before patch
[INFO ]  PCI: Static device PCI: 00:07.2 not found, disabling it.
[INFO ]  PCI: Static device PCI: 00:07.3 not found, disabling it.
after patch
[DEBUG]  PCI: 00:07.2 subordinate bus PCI Express
[DEBUG]  PCI: 00:07.2 [8086/7ec6] enabled
[DEBUG]  PCI: 00:07.3 subordinate bus PCI Express
[DEBUG]  PCI: 00:07.3 [8086/7ec7] enabled

Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Change-Id: Ia1bdc9b5c0533bdddae67b8039103162a57fdc39
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67530
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
2022-09-14 05:29:16 +00:00
3rdparty Update arm-trusted-firmware submodule to upstream master 2022-09-07 09:21:09 +00:00
Documentation Documentation/community: Update leadership meeting link 2022-09-09 20:28:12 +00:00
LICENSES src/mb: Update unlicensable files with the CC-PDDC SPDX ID 2022-08-13 19:25:12 +00:00
configs configs/config.prodrive_hermes: Fix typo 2022-09-06 17:56:35 +00:00
payloads cbfs/vboot: Adapt to new vb2_digest API 2022-09-02 23:51:29 +00:00
spd util/spd_tools: Update LP5X support for ADL/RPL/MTL 2022-09-07 22:19:21 +00:00
src soc/intel/meteorlake: Enable tbtPcie2/3 2022-09-14 05:29:16 +00:00
tests tests/lib/coreboot_table-test.c: Use ALIGN_UP macro 2022-09-12 15:31:37 +00:00
util intelp2m: Add Go Managing Dependencies System support 2022-09-12 12:55:05 +00:00
.checkpatch.conf checkpatch.conf: Disable gerrit change ID for coreboot 2022-04-12 20:39:50 +00:00
.clang-format
.editorconfig
.gitignore .gitignore: Add .vscode/ 2022-08-30 17:56:55 +00:00
.gitmodules Add SBOM (Software Bill of Materials) Generation 2022-08-22 14:48:46 +00:00
.gitreview
.mailmap .mailmap: Add a .mailmap file for git 2022-03-08 18:53:47 +00:00
AUTHORS arm/libgcc: Support signed 64-bit division 2022-08-13 17:20:32 +00:00
COPYING
MAINTAINERS MAINTAINERS: Update AMD maintenance lists 2022-08-25 16:08:09 +00:00
Makefile Makefile: Add util/kconfig/Makefile.real to nocompile list 2022-07-17 22:17:10 +00:00
Makefile.inc Makefile.inc: Fix build hang if file-size is run on empty string 2022-09-06 15:48:53 +00:00
README.md Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
gnat.adc
toolchain.inc build system: immediately report what users are supposed to look into 2021-10-18 16:39:25 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.