coreboot-kgpe-d16/src/mainboard/intel/minnow3/gpio.h
Brenton Dong 6530b6d30d intel/minnow3: Implement and configure GPIO tables
Copy GPIO table implementation from the google/reef board except
with board variant features removed. Also exlcude CrOS GPIO functions.
Remove previous romstage GPIO implementation in brd_gpio.h and romstage.c.

Configure GPIO settings for MinnowBoard 3.

Change-Id: Id2817dcf2f8f196ecd13c810f7f0010a115db566
Signed-off-by: Brenton Dong <brenton.m.dong@intel.com>
Reviewed-on: https://review.coreboot.org/18375
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-22 23:22:13 +01:00

20 lines
764 B
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/gpio.h>
const struct pad_config *gpio_table(size_t *num);
const struct pad_config *early_gpio_table(size_t *num);
const struct pad_config *sleep_gpio_table(size_t *num);