coreboot-kgpe-d16/util/mainboard/google/trembyle/template/overridetree.cb
Zheng Bao 795d73c6d8 soc/amd/picasso: Update coreboot UPD variable names to include units
Use command below to change the variable globally.

sed -i "s/\<variable\>/variable_u/g" `grep variable -rl ./ \
   --exclude-dir=build --exclude-dir=crossgcc`

BUG=b:171334623
TEST=Build

Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-11-06 13:02:24 +00:00

47 lines
1.3 KiB
Text

# SPDX-License-Identifier: GPL-2.0-or-later
chip soc/amd/picasso
# Start : OPN Performance Configuration
# See devhub #55593 Chapter 3.2 for documentation
# For the below fields, 0 indicates use SOC default
# System config index
register "system_config" = "2"
# Set STAPM confiuration. All of these fields must be set >0 to take affect
register "slow_ppt_limit_mW" = "25000"
register "fast_ppt_limit_mW" = "30000"
register "slow_ppt_time_constant_s" = "5"
register "stapm_time_constant_s" = "200"
register "sustained_power_limit_mW" = "15000"
register "telemetry_vddcr_vdd_slope_mA" = "71222"
register "telemetry_vddcr_vdd_offset" = "0"
register "telemetry_vddcr_soc_slope_mA" = "28977"
register "telemetry_vddcr_soc_offset" = "0"
# End : OPN Performance Configuration
# Enable I2C2 for trackpad, touchscreen, pen at 400kHz
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,
}"
# Enable I2C3 for H1 400kHz
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
.early_init = true,
}"
# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on
subsystemid 0x1022 0x1510 inherit
device pci 1.6 off end # GPP Bridge 5
device pci 1.7 on end # GPP Bridge 6 - NVME
device pci 14.6 off end # Non-Functional SDHCI
end # domain
device mmio 0xfedc4000 on end
end # chip soc/amd/picasso