396b072297
Most things still needs to be filled in, but this will allow us to build boards which use this SOC. Change-Id: Ic790685a78193ccb223f4d9355bd3db57812af39 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/170836 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 462456fd00164c10c80eff72240226a04445fe60) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6431 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
42 lines
768 B
Text
42 lines
768 B
Text
config SOC_NVIDIA_TEGRA124
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depends on ARCH_ARMV7
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bool
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default n
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if SOC_NVIDIA_TEGRA124
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config BOOTBLOCK_CPU_INIT
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string
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default "soc/nvidia/tegra124/bootblock.c"
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help
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CPU/SoC-specific bootblock code. This is useful if the
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bootblock must load microcode or copy data from ROM before
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searching for the bootblock.
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# ROM image layout.
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#
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# 0x00000 Combined bootblock and BCT blob
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# 0x18000 Master CBFS header.
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# 0x18080 Free for CBFS data.
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config BOOTBLOCK_ROM_OFFSET
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hex
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default 0x0
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config CBFS_HEADER_ROM_OFFSET
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hex "offset of master CBFS header in ROM"
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default 0x18000
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config CBFS_ROM_OFFSET
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hex "offset of CBFS data in ROM"
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default 0x18080
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config SYS_SDRAM_BASE
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hex
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default 0x80000000
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config BOOTBLOCK_BASE
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hex
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default 0x80000000
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endif
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