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Maulik V Vaghela 7e06a9044a mb/google/dedede: Enable "FastPkgCRampDisable" upd for noise mitigation
As part of acoustic noise mitigation calibration, we need to enable
FastPkgCRampDisable upd along with slew rate = 1. This values has been
derived based on noise calibration done.

Please refer document 575216 for procedure.

BUG=None
BRANCH=dedede
TEST=correct value has been programmed and slew rate measurement
is correct on scope.

Change-Id: Ie42c8ab647ff42fa043b6f717a9834f9b9c551f6
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
2021-01-08 07:41:20 +00:00
3rdparty 3rdparty/libgfxinit: Update for Cannon Point support 2020-12-28 17:27:21 +00:00
Documentation Documentation: Add Beaglebone Black documentation 2020-12-24 08:30:28 +00:00
LICENSES
configs configs: Add a weird config for Asus P8Z77-V LX2 2020-12-14 21:01:17 +00:00
payloads libpayload/lpgcc: Check for `libpayload.config` for in-tree builds 2021-01-01 21:42:41 +00:00
src mb/google/dedede: Enable "FastPkgCRampDisable" upd for noise mitigation 2021-01-08 07:41:20 +00:00
tests edist-test: Fix _Static_assert missing message string 2020-12-02 10:38:25 +00:00
util cpu/intel/model_206ax: Rename `cX_acpower` options 2021-01-06 16:51:30 +00:00
.checkpatch.conf
.clang-format
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.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
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MAINTAINERS MAINTAINERS: Add maintainer for ACPI 2021-01-04 23:13:18 +00:00
Makefile Makefile: Add $(xcompile) to specify where to write xcompile 2020-12-23 03:40:35 +00:00
Makefile.inc drivers/vpd: Add VPD region to default FMAP when selected 2021-01-04 23:12:35 +00:00
README.md
gnat.adc
toolchain.inc

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.