Arthur Heymans d28d507190 sb/intel/bd82x6x/lpc: Set up default LPC decode ranges ... This sets up some common default LPC decode ranges in a common place. This may set up more decode ranges than needed but that typically does not hurt. Mainboards needing additional ranges can do so in the mainboard pch_enable_lpc hook. Change-Id: Ifeb5a862e56f415aa847d0118a33a31537ab8037 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33549 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2019-10-16 14:08:29 +00:00
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b75pro3-m	sb/intel/bd82x6x/lpc: Set up default LPC decode ranges	2019-10-16 14:08:29 +00:00
e350m1	sb/amd/cimx/sb800: Get rid of power button device in coreboot	2019-05-20 14:43:44 +00:00
g41c-gs	sb/intel/i82801gx: Move CIR init to a common place	2019-10-11 12:21:25 +00:00
h81m-hds	soc/intel: Use common romstage code	2019-08-26 21:08:41 +00:00
h110m	soc/intel/skylake: devicetree: introduce PchHdaVcType fsp parameter	2019-10-02 11:15:00 +00:00
imb-a180	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
Kconfig
Kconfig.name