coreboot-kgpe-d16/src/mainboard/emulation/spike-riscv
Julius Werner baf27dbaeb cbfs: Enable CBFS mcache on most chipsets
This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is
enabled by default. Some older chipsets with insufficient SRAM/CAR space
still have it explicitly disabled. All others get the new section added
to their memlayout... 8K seems like a sane default to start with.

Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-12-02 22:12:10 +00:00
..
board_info.txt
clint.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
devicetree.cb mb/emulation: Remove fake devicetree.cb components 2020-05-28 09:29:45 +00:00
Kconfig treewide: Add Kconfig variable MEMLAYOUT_LD_FILE 2020-06-13 06:49:23 +00:00
Kconfig.name Kconfig: comply to Linux 5.3's Kconfig language rules 2019-11-23 20:09:56 +00:00
mainboard.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Makefile.inc treewide: Add Kconfig variable MEMLAYOUT_LD_FILE 2020-06-13 06:49:23 +00:00
memlayout.ld cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
rom_media.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
romstage.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
uart.c include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00